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Компонент | Описание | Производитель | PDF | Buy |
GL828-MNG | USB 2.0 SD/MMC Single Slot Card Reader Controller | GENESYS LOGIC | | |
NB4L52MNG | 2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop with Reset Multi-Level Inputs to LVPECL Translator w/ Internal Termination | ON Semiconductor | | |
NB6L14MNG | 2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer | ON Semiconductor | | |
NB6L14MNG | 2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer | ON Semiconductor | | |
NB6L72MNG | 2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL Outputs | ON Semiconductor | | |
NBSG14MNG | 2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs | ON Semiconductor | | |
NBSG16MNG | 2.5V/3.3V SiGe Differential Receiver/Driver with RSECL Outputs | ON Semiconductor | | |
GL826-MNG | USB 2.0 Multi-Slot Flash Card Reader Controller (All-in-one with Dual SD/MMC bus Interface) | GENESYS LOGIC | | |
GL827-MNG | USB 2.0 Single Slot SD/MMC/MS/SM/xD-Picture Card Reader Controller | GENESYS LOGIC | | |
NB7L14MNG | 2.5V / 3.3V 7GHz/10Gbps Differential 1:4 LVPECL Fanout Buffer | ON Semiconductor | | |
NBSG11MNG | 2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL Outputs | ON Semiconductor | | |
NB4L16MMNG | 2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Translator with Internal Termination | ON Semiconductor | | |
NB4N441MNG | 3.3V Serial Input MultiProtocol PLL Clock Synthesizer, Differential LVPECL Output | ON Semiconductor | | |
NB4N441MNG | 3.3V Serial Input MultiProtocol PLL Clock Synthesizer, Differential LVPECL Output | ON Semiconductor | | |
NB6L14SMNG | 2.5 V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer/Translator | ON Semiconductor | | |
NB6L239MNG | 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT /1/2/4/8, /2/4/8/16 Clock Divider | ON Semiconductor | | |
NB7L14MMNG | 2.5V/3.3VDifferential 1:4 Clock/Data Fanout Buffer/Translator with CML Outputs and Internal Termination | ON Semiconductor | | |
NB7L216MNG | 2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Translator with Internal Termination | ON Semiconductor | | |
NB7L585MNG | 2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator | ON Semiconductor | | |
NB7L72MMNG | Multi−Level Inputs w/ Internal Termination | ON Semiconductor | | |
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