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| 74LS112 DATASHEET | |
| Компонент | Описание | Производитель | PDF | Buy |
74LS112 | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | Texas Instruments |  |  |
| *74LS112*: Расширенные результаты | |
| Компонент | Описание | Производитель | PDF | Buy |
| 74LS112 | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | Texas Instruments | | |
| 74LS112 | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs | Fairchild Semiconductor | | |
| 74LS112 | Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear) | Hitachi Semiconductor | | |
| 74LS112 | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP | Motorola, Inc | | |
| HD74LS112 | Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear) | Hitachi Semiconductor | | |
| HD74LS112 | Ouadruple 2-input Positive NAND Gates | Hitachi Semiconductor | | |
| SN74LS112 | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | Texas Instruments | | |
| DM74LS112A | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs | Fairchild Semiconductor | | |
| DM74LS112A | DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS | National Semiconductor | | |
| SN74LS112A | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | Texas Instruments | | |
| SN74LS112A | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | Texas Instruments | | |
| DM74LS112ACW | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop | Fairchild Semiconductor | | |
| SN74LS112AD | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | Texas Instruments | | |
| SN74LS112AD | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | Texas Instruments | | |
| SN74LS112ADE4 | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | Texas Instruments | | |
| SN74LS112ADR | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | Texas Instruments | | |
| SN74LS112ADRE4 | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | Texas Instruments | | |
| DM74LS112AM | DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS | National Semiconductor | | |
| DM74LS112AMX | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop | Fairchild Semiconductor | | |
| DM74LS112AN | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs | Fairchild Semiconductor | | |
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