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![](/forums/images/ca_evo_db/misc/spacer.gif) | 74F552SCX DATASHEET | ![](/forums/images/ca_evo_db/misc/spacer.gif) |
Компонент | Описание | Производитель | PDF | Buy |
74F552SCX | Octal Registered Transceiver with Parity and Flags | Fairchild Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
![](/forums/images/ca_evo_db/misc/spacer.gif) | *74F5*: Расширенные результаты | ![](/forums/images/ca_evo_db/misc/spacer.gif) |
Компонент | Описание | Производитель | PDF | Buy |
M38B74F5 | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER | Renesas Technology Corp | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
74F50109 | Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
N74F50109D | Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
N74F50109N | Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
74F50728 | Synchronizing cascaded dual positive edge-triggered D-type flip-flop | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
I74F50728D | Synchronizing cascaded dual positive edge-triggered D-type flip-flop | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
N74F50728D | Synchronizing cascaded dual positive edge-triggered D-type flip-flop | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
I74F50728N | Synchronizing cascaded dual positive edge-triggered D-type flip-flop | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
N74F50728N | Synchronizing cascaded dual positive edge-triggered D-type flip-flop | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
74F50729 | Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
I74F50729D | Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
N74F50729D | Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
N74F50729N | Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
I74F50729N | Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
74F5074 | Synchronizing dual D-type flip-flop/clock driver | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
N74F5074D | Synchronizing dual D-type flip-flop/clock driver | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
N74F5074N | Synchronizing dual D-type flip-flop/clock driver | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
74F51 | Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate | NXP Semiconductors | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
74F51 | Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate | Fairchild Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
SN74F51 | DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATES | Texas Instruments | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
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