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![](/forums/images/ca_evo_db/misc/spacer.gif) | KV1851E DATASHEET | ![](/forums/images/ca_evo_db/misc/spacer.gif) |
Компонент | Описание | Производитель | PDF | Buy |
KV1851E | VARIABLE CAPACITANCE DIODE | TOKO, Inc | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
![](/forums/images/ca_evo_db/misc/spacer.gif) | *KV18*: Расширенные результаты | ![](/forums/images/ca_evo_db/misc/spacer.gif) |
Компонент | Описание | Производитель | PDF | Buy |
CY7C161KV18 | 144-Mbit DDR II SRAM Two-Word Burst Architecture | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1146KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1148KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1143KV18 | 18-Mbit QDR^ II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1150KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1157KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1161KV18 | 18-Mbit QDR^ II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1163KV18 | 18-Mbit QDR^ II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1165KV18 | 18-Mbit QDR^ II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1168KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1166KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1170KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1177KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1176KV18 | 18-Mbit QDR^ II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1241KV18 | 36-Mbit QDR^ II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1243KV18 | 36-Mbit QDR^ II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1245KV18 | 36-Mbit QDR^ II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1246KV18 | 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1248KV18 | 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
CY7C1250KV18 | 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) | Cypress Semiconductor | ![](/images/pdf_icon.png) | ![](/images/alisearch.png) |
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