usb_drv.h

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00013 
00014 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions are met:
00018  *
00019  * 1. Redistributions of source code must retain the above copyright notice,
00020  * this list of conditions and the following disclaimer.
00021  *
00022  * 2. Redistributions in binary form must reproduce the above copyright notice,
00023  * this list of conditions and the following disclaimer in the documentation
00024  * and/or other materials provided with the distribution.
00025  *
00026  * 3. The name of ATMEL may not be used to endorse or promote products derived
00027  * from this software without specific prior written permission.
00028  *
00029  * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
00030  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00031  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
00032  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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00040 
00041 
00042 #ifndef _USB_DRV_H_
00043 #define _USB_DRV_H_
00044 
00045 //_____ I N C L U D E S ____________________________________________________
00046 
00047 
00048 typedef enum endpoint_parameter{ep_num, ep_type, ep_direction, ep_size, ep_bank, nyet_status} t_endpoint_parameter;
00049 
00053 
00054 //_____ M A C R O S ________________________________________________________
00055 
00056 #define MAX_EP_NB             7
00057 
00058 #define EP_CONTROL            0
00059 #define EP_1                  1
00060 #define EP_2                  2
00061 #define EP_3                  3
00062 #define EP_4                  4
00063 #define EP_5                  5
00064 #define EP_6                  6
00065 #define EP_7                  7
00066 
00067 #define PIPE_CONTROL          0
00068 #define PIPE_0                0
00069 #define PIPE_1                1
00070 #define PIPE_2                2
00071 #define PIPE_3                3
00072 #define PIPE_4                4
00073 #define PIPE_5                5
00074 #define PIPE_6                6
00075 #define PIPE_7                7
00076 
00077 // USB EndPoint
00078 #define MSK_EP_DIR            0x7F
00079 #define MSK_UADD              0x7F
00080 #define MSK_EPTYPE            0xC0
00081 #define MSK_EPSIZE            0x70
00082 #define MSK_EPBK              0x0C
00083 #define MSK_DTSEQ             0x0C
00084 #define MSK_NBUSYBK           0x03
00085 #define MSK_CURRBK            0x03
00086 #define MSK_DAT               0xFF  // UEDATX
00087 #define MSK_BYCTH             0x07  // UEBCHX
00088 #define MSK_BYCTL             0xFF  // UEBCLX
00089 #define MSK_EPINT             0x7F  // UEINT
00090 #define MSK_HADDR             0xFF  // UHADDR
00091 
00092 // USB Pipe
00093 #define MSK_PNUM              0x07  // UPNUM
00094 #define MSK_PRST              0x7F  // UPRST
00095 #define MSK_PTYPE             0xC0  // UPCFG0X
00096 #define MSK_PTOKEN            0x30
00097 #define MSK_PEPNUM            0x0F
00098 #define MSK_PSIZE             0x70  // UPCFG1X
00099 #define MSK_PBK               0x0C
00100 
00101 #define MSK_NBUSYBK           0x03
00102 
00103 #define MSK_ERROR             0x1F
00104 
00105 #define MSK_PTYPE             0xC0  // UPCFG0X
00106 #define MSK_PTOKEN            0x30
00107 #define MSK_TOKEN_SETUP       0x30
00108 #define MSK_TOKEN_IN          0x10
00109 #define MSK_TOKEN_OUT         0x20
00110 #define MSK_PEPNUM            0x0F
00111 
00112 #define MSK_PSIZE             0x70  // UPCFG1X
00113 #define MSK_PBK               0x0C
00114 
00115 
00116 // Parameters for endpoint configuration
00117 // These define are the values used to enable and configure an endpoint.
00118 #define TYPE_CONTROL             0
00119 #define TYPE_ISOCHRONOUS         1
00120 #define TYPE_BULK                2
00121 #define TYPE_INTERRUPT           3
00122  //typedef enum ep_type {TYPE_CONTROL, TYPE_BULK, TYPE_ISOCHRONOUS, TYPE_INTERRUPT} e_ep_type;
00123 
00124 #define DIRECTION_OUT            0
00125 #define DIRECTION_IN             1
00126  //typedef enum ep_dir {DIRECTION_OUT, DIRECTION_IN} e_ep_dir;
00127 
00128 #define SIZE_8                   0
00129 #define SIZE_16                  1
00130 #define SIZE_32                  2
00131 #define SIZE_64                  3
00132 #define SIZE_128                 4
00133 #define SIZE_256                 5
00134 #define SIZE_512                 6
00135 #define SIZE_1024                7
00136  //typedef enum ep_size {SIZE_8,   SIZE_16,  SIZE_32,  SIZE_64,
00137  //                      SIZE_128, SIZE_256, SIZE_512, SIZE_1024} e_ep_size;
00138 
00139 #define ONE_BANK                 0
00140 #define TWO_BANKS                1
00141  //typedef enum ep_bank {ONE_BANK, TWO_BANKS} e_ep_bank;
00142 
00143 #define NYET_ENABLED             0
00144 #define NYET_DISABLED            1
00145  //typedef enum ep_nyet {NYET_DISABLED, NYET_ENABLED} e_ep_nyet;
00146 
00147 #define TOKEN_SETUP              0
00148 #define TOKEN_IN                 1
00149 #define TOKEN_OUT                2
00150 
00151 #define Is_ep_addr_in(x)         (  (x&USB_ENDPOINT_DIR_MASK)?   TRUE : FALSE)
00152 
00153 
00155 #define VBUSRISE_20MS            0x00   // HOST : Minimum delay after Vbus requested to get it > Va_vbus_valid (otherwise => error)
00156 #define VBUSRISE_50MS            0x01
00157 #define VBUSRISE_70MS            0x02
00158 #define VBUSRISE_100MS           0x03
00159 
00160 #define VBUSPULSE_15MS           0x20   // DEVICE : Duration of Vbus pulse during SRP protocol
00161 #define VBUSPULSE_23MS           0x21
00162 #define VBUSPULSE_31MS           0x22
00163 #define VBUSPULSE_40MS           0x23
00164 
00165 #define VFALLTMOUT_93MS          0x40   // DEVICE : Minimum delay after Vbus < Vb_sess_end to enable SRP
00166 #define VFALLTMOUT_105MS         0x41
00167 #define VFALLTMOUT_118MS         0x42
00168 #define VFALLTMOUT_131MS         0x43
00169 
00170 #define SRPMINDET_10US           0x60   // HOST : Minimum pulse duration accepted as SRP pulse
00171 #define SRPMINDET_100US          0x61
00172 #define SRPMINDET_1MS            0x62
00173 #define SRPMINDET_11MS           0x63
00174 
00175 
00179 #define Usb_build_ep_config0(type, dir, nyet)     ((type<<6) | (nyet<<1) | (dir))
00180 #define Usb_build_ep_config1(size, bank     )     ((size<<4) | (bank<<2)        )
00181 #define usb_configure_endpoint(num, type, dir, size, bank, nyet)             \
00182                                     ( Usb_select_endpoint(num),              \
00183                                       usb_config_ep(Usb_build_ep_config0(type, dir, nyet),\
00184                                                     Usb_build_ep_config1(size, bank)    ))
00185 
00186 #define Host_build_pipe_config0(type, token, ep_num)     ((type<<6) | (token<<4) | (ep_num))
00187 #define Host_build_pipe_config1(size, bank     )         ((size<<4) | (bank<<2)        )
00188 #define host_configure_pipe(num, type, token,ep_num, size, bank, freq)             \
00189                                     ( Host_select_pipe(num),              \
00190                                       Host_set_interrupt_frequency(freq), \
00191                                       host_config_pipe(Host_build_pipe_config0(type, token, ep_num),\
00192                                                        Host_build_pipe_config1(size, bank)    ))
00194 
00199 #define Usb_enable_regulator()          (UHWCON |= (1<<UVREGE))
00201 #define Usb_disable_regulator()         (UHWCON &= ~(1<<UVREGE))
00203 #define Is_usb_regulator_enabled()      ((UHWCON &  (1<<UVREGE))  ? TRUE : FALSE)
00205 
00210 #define Usb_enable_uid_pin()            (UHWCON |= (1<<UIDE))
00212 #define Usb_disable_uid_pin()           (UHWCON &= ~(1<<UIDE))
00214 #define Usb_force_device_mode()         (Usb_disable_uid_pin(), UHWCON |= (1<<UIMOD))
00216 #define Usb_force_host_mode()           (Usb_disable_uid_pin(), UHWCON &= ~(1<<UIMOD))
00218 #define Usb_enable_uvcon_pin()          (UHWCON |= (1<<UVCONE))
00220 #define Usb_disable_uvcon_pin()         (UHWCON &= ~(1<<UVCONE))
00222 #define Usb_full_speed_mode()           (UHWCON |= (1<<UDSS))
00224 #define Usb_low_speed_mode()            (UHWCON &= ~(1<<UDSS))
00225 
00227 #define Usb_enable()                  (USBCON |= ((1<<USBE) | (1<<OTGPADE)))
00229 #define Usb_disable()                 (USBCON &= ~((1<<USBE) | (1<<OTGPADE)))
00230 #define Is_usb_enabled()              ((USBCON  &   (1<<USBE))   ? TRUE : FALSE)
00231 
00233 #define Usb_engine_enable()            (USBCON |= (1<<USBE) )
00235 #define Usb_engine_disable()           (USBCON &= ~(1<<USBE))
00236 
00237 
00239 #define Usb_enable_vbus_pad()         (USBCON |= (1<<OTGPADE))
00241 #define Usb_disable_vbus_pad()        (USBCON &= ~(1<<OTGPADE))
00242 
00243 #define Usb_select_device()           (USBCON  &= ~(1<<HOST))
00244 #define Usb_select_host()             (USBCON  |=  (1<<HOST))
00245 #define Is_usb_host_enabled()         ((USBCON  &   (1<<HOST))   ? TRUE : FALSE)
00246 #define Is_usb_device_enabled()       ((USBCON & (1<<HOST)) ? FALSE : TRUE)
00247 
00249 #define Select_full_speed_operation() (UDCON &= ~(1<<LSM))
00251 #define Select_low_speed_operation()  (UDCON |= (1<<LSM))
00252 
00254 #define Usb_freeze_clock()            (USBCON  |=  (1<<FRZCLK))
00255 #define Usb_unfreeze_clock()          (USBCON  &= ~(1<<FRZCLK))
00256 #define Is_usb_clock_freezed()        ((USBCON  &   (1<<FRZCLK)) ? TRUE : FALSE)
00257 
00258 #define Usb_enable_id_interrupt()     (USBCON  |=  (1<<IDTE))
00259 #define Usb_disable_id_interrupt()    (USBCON  &= ~(1<<IDTE))
00260 #define Is_usb_id_interrupt_enabled() ((USBCON &  (1<<IDTE))     ? TRUE : FALSE)
00261 #define Is_usb_id_device()            ((USBSTA &   (1<<ID))      ? TRUE : FALSE)
00262 #define Is_usb_id_host()              ((USBSTA & (1<<ID))        ? FALSE : TRUE)
00263 #define Usb_ack_id_transition()       (USBINT  = ~(1<<IDTI))
00264 #define Is_usb_id_transition()        ((USBINT &   (1<<IDTI))    ? TRUE : FALSE)
00265 
00266 #define Usb_enable_vbus_interrupt()   (USBCON  |=  (1<<VBUSTE))
00267 #define Usb_disable_vbus_interrupt()  (USBCON  &= ~(1<<VBUSTE))
00268 #define Is_usb_vbus_interrupt_enabled() ((USBCON &  (1<<VBUSTE))     ? TRUE : FALSE)
00269 #define Is_usb_vbus_high()            ((USBSTA &   (1<<VBUS))    ? TRUE : FALSE)
00270 #define Is_usb_vbus_low()             ((USBSTA &   (1<<VBUS))    ? FALSE : TRUE)
00271 #define Usb_ack_vbus_transition()     (USBINT  = ~(1<<VBUSTI))
00272 #define Is_usb_vbus_transition()      ((USBINT &   (1<<VBUSTI))  ? TRUE : FALSE)
00273 
00275 #define Usb_get_general_interrupt()      (USBINT & (USBCON & MSK_IDTE_VBUSTE))
00277 #define Usb_ack_all_general_interrupt()  (USBINT = ~(USBCON & MSK_IDTE_VBUSTE))
00278 #define Usb_ack_cache_id_transition(x)   ((x)  &= ~(1<<IDTI))
00279 #define Usb_ack_cache_vbus_transition(x) ((x)  &= ~(1<<VBUSTI))
00280 #define Is_usb_cache_id_transition(x)    (((x) &   (1<<IDTI))  )
00281 #define Is_usb_cache_vbus_transition(x)  (((x) &   (1<<VBUSTI)))
00282 
00284 #define Usb_get_otg_interrupt()            (OTGINT & OTGIEN)
00286 #define Usb_ack_all_otg_interrupt()        (OTGINT = ~OTGIEN)
00287 #define Is_otg_cache_bconnection_error(x)  (((x) &   MSK_BCERRI))
00288 #define Usb_ack_cache_bconnection_error(x) ((x)  &= ~MSK_BCERRI)
00289 
00290 #define Usb_enter_dpram_mode()        (UDPADDH =  (1<<DPACC))
00291 #define Usb_exit_dpram_mode()         (UDPADDH =  (U8)~(1<<DPACC))
00292 #define Usb_set_dpram_address(addr)   (UDPADDH =  (1<<DPACC) + ((Uint16)addr >> 8), UDPADDL = (Uchar)addr)
00293 #define Usb_write_dpram_byte(val)     (UEDATX=val)
00294 #define Usb_read_dpram_byte()         (UEDATX)
00295 
00297 #define Usb_enable_vbus()             (OTGCON  |=  (1<<VBUSREQ))
00299 #define Usb_disable_vbus()            (OTGCON  |=  (1<<VBUSRQC))
00301 #define Usb_enable_manual_vbus()      (PORTE|=0x80,DDRE|=0x80,Usb_disable_uvcon_pin())
00303 #define Usb_disable_manual_vbus()     (PORTE&=~0x80,DDRE|=0x80,Usb_enable_uvcon_pin())
00305 #define Is_usb_vbus_manual_on()       (((PINE&0x80) != 0) ? TRUE : FALSE)
00306 
00308 #define Usb_device_initiate_hnp()     (OTGCON  |=  (1<<HNPREQ))
00310 #define Usb_device_stop_hnp()         (OTGCON  &=  ~(1<<HNPREQ))
00312 #define Usb_host_accept_hnp()         (OTGCON  |=  (1<<HNPREQ))
00314 #define Usb_host_reject_hnp()         (OTGCON  &= ~(1<<HNPREQ))
00316 #define Usb_device_initiate_srp()     (OTGCON  |=  (1<<SRPREQ))
00318 #define Usb_select_vbus_srp_method()  (OTGCON  |=  (1<<SRPSEL))
00320 #define Usb_select_data_srp_method()  (OTGCON  &= ~(1<<SRPSEL))
00322 #define Usb_enable_vbus_hw_control()  (OTGCON  &= ~(1<<VBUSHWC))
00324 #define Usb_disable_vbus_hw_control() (OTGCON  |=  (1<<VBUSHWC))
00326 #define Is_usb_vbus_enabled()         ((OTGCON &   (1<<VBUSREQ)) ? TRUE : FALSE)
00328 #define Is_usb_hnp()                  ((OTGCON &   (1<<HNPREQ))  ? TRUE : FALSE)
00330 #define Is_usb_device_srp()           ((OTGCON &   (1<<SRPREQ))  ? TRUE : FALSE)
00332 #define Is_usb_device_initiating_srp()           ((OTGCON &   (1<<SRPREQ))  ? TRUE : FALSE)
00333 
00335 #define Set_otg_custom_timer(sel)                 (OTGTCON = sel)
00336 
00338 #define Usb_enable_suspend_time_out_interrupt()   (OTGIEN  |=  (1<<STOE))
00340 #define Usb_disable_suspend_time_out_interrupt()  (OTGIEN  &= ~(1<<STOE))
00341 #define Is_suspend_time_out_interrupt_enabled()   ((OTGIEN &  (1<<STOE))   ? TRUE : FALSE)
00343 #define Usb_ack_suspend_time_out_interrupt()      (OTGINT  &= ~(1<<STOI))
00345 #define Is_usb_suspend_time_out_interrupt()       ((OTGINT &   (1<<STOI))    ? TRUE : FALSE)
00346 
00348 #define Usb_enable_hnp_error_interrupt()          (OTGIEN  |=  (1<<HNPERRE))
00350 #define Usb_disable_hnp_error_interrupt()         (OTGIEN  &= ~(1<<HNPERRE))
00351 #define Is_hnp_error_interrupt_enabled()          ((OTGIEN &  (1<<HNPERRE))   ? TRUE : FALSE)
00353 #define Usb_ack_hnp_error_interrupt()             (OTGINT  &= ~(1<<HNPERRI))
00355 #define Is_usb_hnp_error_interrupt()              ((OTGINT &   (1<<HNPERRI)) ? TRUE : FALSE)
00356 
00358 #define Usb_enable_role_exchange_interrupt()      (OTGIEN  |=  (1<<ROLEEXE))
00360 #define Usb_disable_role_exchange_interrupt()     (OTGIEN  &= ~(1<<ROLEEXE))
00361 #define Is_role_exchange_interrupt_enabled()      ((OTGIEN &  (1<<ROLEEXE))   ? TRUE : FALSE)
00363 #define Usb_ack_role_exchange_interrupt()         (OTGINT  &= ~(1<<ROLEEXI))
00365 #define Is_usb_role_exchange_interrupt()          ((OTGINT &   (1<<ROLEEXI)) ? TRUE : FALSE)
00366 
00368 #define Usb_enable_bconnection_error_interrupt()  (OTGIEN  |=  (1<<BCERRE))
00370 #define Usb_disable_bconnection_error_interrupt() (OTGIEN  &= ~(1<<BCERRE))
00371 #define Is_bconnection_error_interrupt_enabled()  ((OTGIEN &  (1<<BCERRE))   ? TRUE : FALSE)
00373 #define Usb_ack_bconnection_error_interrupt()     (OTGINT  &= ~(1<<BCERRI))
00375 #define Is_usb_bconnection_error_interrupt()      ((OTGINT &   (1<<BCERRI))  ? TRUE : FALSE)
00376 
00378 #define Usb_enable_vbus_error_interrupt()         (OTGIEN  |=  (1<<VBERRE))
00380 #define Usb_disable_vbus_error_interrupt()        (OTGIEN  &= ~(1<<VBERRE))
00381 #define Is_vbus_error_interrupt_enabled()         ((OTGIEN &  (1<<VBERRE))   ? TRUE : FALSE)
00383 #define Usb_ack_vbus_error_interrupt()            (OTGINT  &= ~(1<<VBERRI))
00385 #define Is_usb_vbus_error_interrupt()             ((OTGINT &   (1<<VBERRI))  ? TRUE : FALSE)
00386 
00388 #define Usb_enable_srp_interrupt()                (OTGIEN  |=  (1<<SRPE))
00390 #define Usb_disable_srp_interrupt()               (OTGIEN  &= ~(1<<SRPE))
00391 #define Is_srp_interrupt_enabled()                ((OTGIEN &  (1<<SRPE))   ? TRUE : FALSE)
00393 #define Usb_ack_srp_interrupt()                   (OTGINT  &= ~(1<<SRPI))
00395 #define Is_usb_srp_interrupt()                    ((OTGINT &   (1<<SRPI))    ? TRUE : FALSE)
00397 
00398 
00403    #define Usb_initiate_remote_wake_up()             (UDCON   |=  (1<<RMWKUP))
00405    #define Usb_detach()                              (UDCON   |=  (1<<DETACH))
00407    #define Usb_attach()                              (UDCON   &= ~(1<<DETACH))
00409    #define Is_usb_pending_remote_wake_up()           ((UDCON & (1<<RMWKUP)) ? TRUE : FALSE)
00411    #define Is_usb_detached()                         ((UDCON & (1<<DETACH)) ? TRUE : FALSE)
00412 
00414    #define Usb_get_device_interrupt()                (UDINT   &   (1<<UDIEN))
00416    #define Usb_ack_all_device_interrupt()            (UDINT   =  ~(1<<UDIEN))
00417 
00419    #define Usb_enable_remote_wake_up_interrupt()     (UDIEN   |=  (1<<UPRSME))
00421    #define Usb_disable_remote_wake_up_interrupt()    (UDIEN   &= ~(1<<UPRSME))
00422 #define Is_remote_wake_up_interrupt_enabled()     ((UDIEN &  (1<<UPRSME))   ? TRUE : FALSE)
00424 #define Usb_ack_remote_wake_up_start()            (UDINT   = ~(1<<UPRSMI))
00426 #define Is_usb_remote_wake_up_start()             ((UDINT &   (1<<UPRSMI))  ? TRUE : FALSE)
00427 
00429 #define Usb_enable_resume_interrupt()             (UDIEN   |=  (1<<EORSME))
00431 #define Usb_disable_resume_interrupt()            (UDIEN   &= ~(1<<EORSME))
00432 #define Is_resume_interrupt_enabled()             ((UDIEN &  (1<<EORSME))   ? TRUE : FALSE)
00434 #define Usb_ack_resume()                          (UDINT   = ~(1<<EORSMI))
00436 #define Is_usb_resume()                           ((UDINT &   (1<<EORSMI))  ? TRUE : FALSE)
00437 
00439 #define Usb_enable_wake_up_interrupt()            (UDIEN   |=  (1<<WAKEUPE))
00441 #define Usb_disable_wake_up_interrupt()           (UDIEN   &= ~(1<<WAKEUPE))
00442 #define Is_wake_up_interrupt_enabled()            ((UDIEN &  (1<<WAKEUPE))   ? TRUE : FALSE)
00444 #define Usb_ack_wake_up()                         (UDINT   = ~(1<<WAKEUPI))
00446 #define Is_usb_wake_up()                          ((UDINT &   (1<<WAKEUPI)) ? TRUE : FALSE)
00447 
00449 #define Usb_enable_reset_interrupt()              (UDIEN   |=  (1<<EORSTE))
00451 #define Usb_disable_reset_interrupt()             (UDIEN   &= ~(1<<EORSTE))
00452 #define Is_reset_interrupt_enabled()              ((UDIEN &  (1<<EORSTE))   ? TRUE : FALSE)
00454 #define Usb_ack_reset()                           (UDINT   = ~(1<<EORSTI))
00456 #define Is_usb_reset()                            ((UDINT &   (1<<EORSTI))  ? TRUE : FALSE)
00457 
00459 #define Usb_enable_sof_interrupt()                (UDIEN   |=  (1<<SOFE))
00461 #define Usb_disable_sof_interrupt()               (UDIEN   &= ~(1<<SOFE))
00462 #define Is_sof_interrupt_enabled()                ((UDIEN &  (1<<SOFE))   ? TRUE : FALSE)
00464 #define Usb_ack_sof()                             (UDINT   = ~(1<<SOFI))
00466 #define Is_usb_sof()                              ((UDINT &   (1<<SOFI))    ? TRUE : FALSE)
00467 
00469 #define Usb_enable_suspend_interrupt()            (UDIEN   |=  (1<<SUSPE))
00471 #define Usb_disable_suspend_interrupt()           (UDIEN   &= ~(1<<SUSPE))
00472 #define Is_suspend_interrupt_enabled()            ((UDIEN &  (1<<SUSPE))   ? TRUE : FALSE)
00474 #define Usb_ack_suspend()                         (UDINT   = ~(1<<SUSPI))
00476 #define Is_usb_suspend()                          ((UDINT &   (1<<SUSPI))   ? TRUE : FALSE)
00477 
00479 #define Usb_enable_address()                      (UDADDR  |=  (1<<ADDEN))
00481 #define Usb_disable_address()                     (UDADDR  &= ~(1<<ADDEN))
00483 #define Usb_configure_address(addr)               (UDADDR  =   (UDADDR & (1<<ADDEN)) | ((U8)addr & MSK_UADD))
00484 
00486 #define Usb_frame_number()                        ((U16)((((U16)UDFNUMH) << 8) | ((U16)UDFNUML)))
00488 #define Is_usb_frame_number_crc_error()           ((UDMFN & (1<<FNCERR)) ? TRUE : FALSE)
00490 
00491 
00492 
00493 
00498 #define Usb_select_endpoint(ep)                   (UENUM = (U8)ep )
00499 
00501 #define Usb_get_selected_endpoint()               (UENUM )
00502 
00504 #define Usb_reset_endpoint(ep)                    (UERST   =   1 << (U8)ep, UERST  =  0)
00505 
00507 #define Usb_enable_endpoint()                     (UECONX  |=  (1<<EPEN))
00509 #define Usb_enable_stall_handshake()              (UECONX  |=  (1<<STALLRQ))
00511 #define Usb_reset_data_toggle()                   (UECONX  |=  (1<<RSTDT))
00513 #define Usb_disable_endpoint()                    (UECONX  &= ~(1<<EPEN))
00515 #define Usb_disable_stall_handshake()             (UECONX  |=  (1<<STALLRQC))
00517 #define Usb_select_epnum_for_cpu()                (UECONX  &= ~(1<<EPNUMS))
00519 #define Is_usb_endpoint_enabled()                 ((UECONX & (1<<EPEN))    ? TRUE : FALSE)
00521 #define Is_usb_endpoint_stall_requested()         ((UECONX & (1<<STALLRQ)) ? TRUE : FALSE)
00522 
00524 #define Usb_configure_endpoint_type(type)         (UECFG0X =   (UECFG0X & ~(MSK_EPTYPE)) | ((U8)type << 6))
00526 #define Usb_configure_endpoint_direction(dir)     (UECFG0X =   (UECFG0X & ~(1<<EPDIR))  | ((U8)dir))
00527 
00529 #define Usb_configure_endpoint_size(size)         (UECFG1X =   (UECFG1X & ~MSK_EPSIZE) | ((U8)size << 4))
00531 #define Usb_configure_endpoint_bank(bank)         (UECFG1X =   (UECFG1X & ~MSK_EPBK)   | ((U8)bank << 2))
00533 #define Usb_allocate_memory()                     (UECFG1X |=  (1<<ALLOC))
00535 #define Usb_unallocate_memory()                   (UECFG1X &= ~(1<<ALLOC))
00536 
00538 #define Usb_ack_overflow_interrupt()              (UESTA0X &= ~(1<<OVERFI))
00540 #define Usb_ack_underflow_interrupt()             (UESTA0X &= ~(1<<UNDERFI))
00542 #define Usb_ack_zlp()                             (UESTA0X &= ~(1<<ZLPSEEN))
00544 #define Usb_data_toggle()                         ((UESTA0X&MSK_DTSEQ) >> 2)
00546 #define Usb_nb_busy_bank()                        (UESTA0X &   MSK_NBUSYBK)
00548 #define Is_usb_one_bank_busy()                    ((UESTA0X &  MSK_NBUSYBK) == 0 ? FALSE : TRUE)
00550 #define Is_endpoint_configured()                  ((UESTA0X &  (1<<CFGOK))   ? TRUE : FALSE)
00552 #define Is_usb_overflow()                         ((UESTA0X &  (1<<OVERFI))  ? TRUE : FALSE)
00554 #define Is_usb_underflow()                        ((UESTA0X &  (1<<UNDERFI)) ? TRUE : FALSE)
00556 #define Is_usb_zlp()                              ((UESTA0X &  (1<<ZLPSEEN)) ? TRUE : FALSE)
00557 
00559 #define Usb_control_direction()                   ((UESTA1X &  (1<<CTRLDIR)) >> 2)
00561 #define Usb_current_bank()                        ( UESTA1X & MSK_CURRBK)
00562 
00564 #define Usb_ack_fifocon()                         (UEINTX &= ~(1<<FIFOCON))
00566 #define Usb_ack_nak_in()                          (UEINTX &= ~(1<<NAKINI))
00568 #define Usb_ack_nak_out()                         (UEINTX &= ~(1<<NAKOUTI))
00570 #define Usb_ack_receive_setup()                   (UEINTX &= ~(1<<RXSTPI))
00572 #define Usb_ack_receive_out()                     (UEINTX &= ~(1<<RXOUTI), Usb_ack_fifocon())
00574 #define Usb_ack_stalled()                         (MSK_STALLEDI=   0)
00576 #define Usb_ack_in_ready()                        (UEINTX &= ~(1<<TXINI), Usb_ack_fifocon())
00578 #define Usb_kill_last_in_bank()                   (UENTTX |= (1<<RXOUTI))
00580 #define Is_usb_read_enabled()                     (UEINTX&(1<<RWAL))
00582 #define Is_usb_write_enabled()                    (UEINTX&(1<<RWAL))
00584 #define Is_usb_read_control_enabled()             (UEINTX&(1<<TXINI))
00586 #define Is_usb_nak_in_sent()                      (UEINTX&(1<<NAKINI))
00588 #define Is_usb_nak_out_sent()                     (UEINTX&(1<<NAKOUTI))
00590 #define Is_usb_receive_setup()                    (UEINTX&(1<<RXSTPI))
00592 #define Is_usb_receive_out()                      (UEINTX&(1<<RXOUTI))
00594 #define Is_usb_in_ready()                         (UEINTX&(1<<TXINI))
00596 #define Usb_send_in()                             (UEINTX &= ~(1<<FIFOCON))
00598 #define Usb_send_control_in()                     (UEINTX &= ~(1<<TXINI))
00600 #define Usb_free_out_bank()                       (UEINTX &= ~(1<<FIFOCON))
00602 #define Usb_ack_control_out()                     (UEINTX &= ~(1<<RXOUTI))
00603 
00605 #define Usb_enable_flow_error_interrupt()         (UEIENX  |=  (1<<FLERRE))
00607 #define Usb_enable_nak_in_interrupt()             (UEIENX  |=  (1<<NAKINE))
00609 #define Usb_enable_nak_out_interrupt()            (UEIENX  |=  (1<<NAKOUTE))
00611 #define Usb_enable_receive_setup_interrupt()      (UEIENX  |=  (1<<RXSTPE))
00613 #define Usb_enable_receive_out_interrupt()        (UEIENX  |=  (1<<RXOUTE))
00615 #define Usb_enable_stalled_interrupt()            (UEIENX  |=  (1<<STALLEDE))
00617 #define Usb_enable_in_ready_interrupt()           (UEIENX  |=  (1<<TXIN))
00619 #define Usb_disable_flow_error_interrupt()        (UEIENX  &= ~(1<<FLERRE))
00621 #define Usb_disable_nak_in_interrupt()            (UEIENX  &= ~(1<<NAKINE))
00623 #define Usb_disable_nak_out_interrupt()           (UEIENX  &= ~(1<<NAKOUTE))
00625 #define Usb_disable_receive_setup_interrupt()     (UEIENX  &= ~(1<<RXSTPE))
00627 #define Usb_disable_receive_out_interrupt()       (UEIENX  &= ~(1<<RXOUTE))
00629 #define Usb_disable_stalled_interrupt()           (UEIENX  &= ~(1<<STALLEDE))
00631 #define Usb_disable_in_ready_interrupt()          (UEIENX  &= ~(1<<TXIN))
00632 
00634 #define Usb_read_byte()                           (UEDATX)
00636 #define Usb_write_byte(byte)                      (UEDATX  =   (U8)byte)
00637 
00639 #define Usb_byte_counter()                        ((((U16)UEBCHX) << 8) | (UEBCLX))
00641 #define Usb_byte_counter_8()                      ((U8)UEBCLX)
00642 
00644 #define Usb_interrupt_flags()                     (UEINT)
00646 #define Is_usb_endpoint_event()                   (Usb_interrupt_flags() != 0x00)
00648 
00649 
00650 
00655    #define Host_allocate_memory()                 (UPCFG1X |=  (1<<ALLOC))
00657    #define Host_unallocate_memory()               (UPCFG1X &= ~(1<<ALLOC))
00659    #define Is_host_pipe_memory_allocated()        (UPCFG1X & (1<<ALLOC) ? TRUE : FALSE)
00660 
00662    #define Host_enable()                          (USBCON |= (1<<HOST))
00663 
00664    #ifndef    SOFEN
00665    #define    SOFEN           0       //For __GNUC__, SOFEN bit missing in default sfr file
00666    #endif
00668    #define Host_enable_sof()                      (UHCON |= (1<<SOFEN))
00670    #define Host_disable_sof()                     (UHCON &= ~(1<<SOFEN))
00672    #define Host_send_reset()                      (UHCON |= (1<<RESET))
00674    #define Host_is_reset()                        ((UHCON & (1<<RESET)) ? TRUE : FALSE)
00676    #define Host_send_resume()                     (UHCON |= (1<<RESUME))
00678    #define Host_is_resume()                       ((UHCON & (1<<RESUME)) ? TRUE : FALSE)
00679 
00681    #define Host_enable_sof_interrupt()            (UHIEN |= (1<<HSOFE))
00683    #define Host_disable_sof_interrupt()           (UHIEN &= ~(1<<HSOFE))
00684 #define Is_host_sof_interrupt_enabled()        ((UHIEN &  (1<<HSOFE))   ? TRUE : FALSE)
00686 #define Host_is_sof()                          ((UHINT & (1<<HSOFI)) ? TRUE : FALSE)
00687 #define Is_host_sof()                          ((UHINT & (1<<HSOFI)) ? TRUE : FALSE)
00688 #define Host_ack_sof()                         (UHINT &= ~(1<<HSOFI))
00689 
00691 #define Host_enable_hwup_interrupt()            (UHIEN |= (1<<HWUPE))
00693 #define Host_disable_hwup_interrupt()           (UHIEN &= ~(1<<HWUPE))
00694 #define Is_host_hwup_interrupt_enabled()        ((UHIEN &  (1<<HWUPE))   ? TRUE : FALSE)
00696 #define Host_is_hwup()                          ((UHINT & (1<<HWUPI)) ? TRUE : FALSE)
00698 #define Is_host_hwup()                          ((UHINT & (1<<HWUPI)) ? TRUE : FALSE)
00699 #define Host_ack_hwup()                         (UHINT &= ~(1<<HWUPI))
00700 
00702 #define Host_enable_down_stream_resume_interrupt()            (UHIEN |= (1<<RSMEDE))
00704 #define Host_disable_down_stream_resume_interrupt()           (UHIEN &= ~(1<<RSMEDE))
00705 #define Is_host_down_stream_resume_interrupt_enabled()        ((UHIEN &  (1<<RSMEDE))   ? TRUE : FALSE)
00707 #define Is_host_down_stream_resume()                          ((UHINT & (1<<RSMEDI)) ? TRUE : FALSE)
00708 #define Host_ack_down_stream_resume()                         (UHINT &= ~(1<<RSMEDI))
00709 
00711 #define Host_enable_remote_wakeup_interrupt()         (UHIEN |= (1<<RXRSME))
00713 #define Host_disable_remote_wakeup_interrupt()        (UHIEN &= ~(1<<RXRSME))
00714 #define Is_host_remote_wakeup_interrupt_enabled()     ((UHIEN &  (1<<RXRSME))   ? TRUE : FALSE)
00716 #define Host_is_remote_wakeup()                       ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE)
00718 #define Is_host_remote_wakeup()                       ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE)
00719 #define Host_ack_remote_wakeup()                      (UHINT &= ~(1<<RXRSMI))
00720 
00722 #define Host_enable_device_connection_interrupt()        (UHIEN |= (1<<DCONNE))
00724 #define Host_disable_device_connection_interrupt()    (UHIEN &= ~(1<<DCONNE))
00725 #define Is_host_device_connection_interrupt_enabled()    ((UHIEN &  (1<<DCONNE))   ? TRUE : FALSE)
00727 #define Is_device_connection()                 (UHINT & (1<<DCONNI))
00729 #define Host_ack_device_connection()           (UHINT = ~(1<<DCONNI))
00730 
00732 #define Host_enable_device_disconnection_interrupt()     (UHIEN |= (1<<DDISCE))
00734 #define Host_disable_device_disconnection_interrupt()    (UHIEN &= ~(1<<DDISCE))
00735 #define Is_host_device_disconnection_interrupt_enabled() ((UHIEN &  (1<<DDISCE))   ? TRUE : FALSE)
00737 #define Is_device_disconnection()              (UHINT & (1<<DDISCI)   ? TRUE : FALSE)
00739 #define Host_ack_device_disconnection()        (UHINT = ~(1<<DDISCI))
00740 
00742 #define Host_enable_reset_interrupt()          (UHIEN   |=  (1<<RSTE))
00744 #define Host_disable_reset_interrupt()         (UHIEN   &= ~(1<<RSTE))
00745 #define Is_host_reset_interrupt_enabled()      ((UHIEN &  (1<<RSTE))   ? TRUE : FALSE)
00747 #define Host_ack_reset()                       (UHINT   = ~(1<<RSTI))
00749 #define Is_host_reset()                        Host_is_reset()
00750 
00751 
00753 #define Host_vbus_request()                    (OTGCON |= (1<<VBUSREQ))
00755 #define Host_clear_vbus_request()              (OTGCON |= (1<<VBUSRQC))
00757 #define Host_configure_address(addr)           (UHADDR = addr & MSK_HADDR)
00758 
00760 #define Is_host_full_speed()                   ((USBSTA &  (1<<SPEED))   ? TRUE : FALSE)
00762 
00763 
00764 
00769 #define Host_select_pipe(p)                    (UPNUM = (U8)p)
00770 
00772 #define Host_get_selected_pipe()              (UPNUM )
00773 
00775 #define Host_enable_pipe()                     (UPCONX |= (1<<PEN))
00777 #define Host_disable_pipe()                    (UPCONX &= ~(1<<PEN))
00778 
00780 #define Host_set_token_setup()                 (UPCFG0X =  UPCFG0X & ~MSK_TOKEN_SETUP)
00782 #define Host_set_token_in()                    (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_IN)
00784 #define Host_set_token_out()                   (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_OUT)
00785 
00787 #define Host_get_endpoint_number()             (UPCFG0X & (MSK_PEPNUM))
00788 
00790 #define Host_get_pipe_interrupt()              (UPINT)
00791 
00793 #define Host_set_interrupt_frequency(frq)      (UPCFG2X = (U8)frq)
00794 
00796 #define Is_pipe_configured()                   (UPSTAX  &  (1<<CFGOK))
00798 #define Is_host_one_bank_busy()                ((UPSTAX &  MSK_NBUSYBK) != 0)
00800 #define Host_number_of_busy_bank()             (UPSTAX &  MSK_NBUSYBK)
00801 
00803 #define Host_reset_pipe(p)                     (UPRST = 1<<p , UPRST = 0)
00804 
00806 #define Host_write_byte(dat)                   (UPDATX = dat)
00808 #define Host_read_byte()                       (UPDATX)
00809 
00811 #define Host_freeze_pipe()                     (UPCONX |=  (1<<PFREEZE))
00813 #define Host_unfreeze_pipe()                   (UPCONX &= ~(1<<PFREEZE))
00815 #define Is_host_pipe_freeze()                  (UPCONX &   (1<<PFREEZE))
00816 
00818 #define Host_reset_pipe_data_toggle()          (UPCONX |=  (1<<RSTDT)  )
00819 
00821 #define Is_host_setup_sent()                   ((UPINTX & (1<<TXSTPI))    ? TRUE : FALSE)
00823 #define Is_host_control_in_received()          ((UPINTX & (1<<RXINI))    ? TRUE : FALSE)
00825 #define Is_host_control_out_sent()             ((UPINTX & (1<<TXOUTI))    ? TRUE : FALSE)
00827 #define Is_host_stall()                        ((UPINTX & (1<<RXSTALLI))    ? TRUE : FALSE)
00829 #define Is_host_pipe_error()                   ((UPINTX & (1<<PERRI))    ? TRUE : FALSE)
00831 #define Host_send_setup()                      (UPINTX  &= ~(1<<FIFOCON))
00833 #define Host_send_control_in()                 (UPINTX  &= ~(1<<FIFOCON))
00835 #define Host_send_control_out()                (UPINTX  &= ~(1<<FIFOCON))
00837 #define Host_ack_control_out()                 (UPINTX  &= ~(1<<TXOUTI))
00839 #define Host_ack_control_in()                  (UPINTX  &= ~(1<<RXINI))
00841 #define Host_ack_setup()                       (UPINTX  &= ~(1<<TXSTPI))
00843 #define Host_ack_stall()                       (UPINTX  &= ~(1<<RXSTALLI))
00844 
00846 #define Host_send_out()                        (UPINTX &= ~(1<<FIFOCON))
00848 #define Is_host_out_sent()                     ((UPINTX & (1<<TXOUTI))    ? TRUE : FALSE)
00850 #define Host_ack_out_sent()                    (UPINTX &= ~(1<<TXOUTI))
00852 #define Is_host_in_received()                  ((UPINTX & (1<<RXINI))    ? TRUE : FALSE)
00854 #define Host_ack_in_received()                 (UPINTX &= ~(1<<RXINI))
00856 #define Host_send_in()                         (UPINTX &= ~(1<<FIFOCON))
00858 #define Is_host_nak_received()                 ((UPINTX & (1<<NAKEDI))    ? TRUE : FALSE)
00860 #define Host_ack_nak_received()                (UPINTX &= ~(1<<NAKEDI))
00861 
00862 
00863 
00865 #define Is_host_read_enabled()                 (UPINTX&(1<<RWAL))
00867 #define Is_host_write_enabled()                 (UPINTX&(1<<RWAL))
00868 
00870 #define Host_standard_in_mode()                (UPCONX &= ~(1<<INMODE))
00872 #define Host_continuous_in_mode()              (UPCONX |=  (1<<INMODE))
00873 
00875 #define Host_in_request_number(in_num)         (UPINRQX = (U8)in_num)
00877 #define Host_get_in_request_number()           (UPINRQX)
00878 
00880 #define Host_data_length_U8()                  (UPBCLX)
00882 #define Host_data_length_U16()                 ((((U16)UPBCHX)<<8) | UPBCLX)
00884 #define Host_byte_counter()                    Host_data_length_U16()
00886 #define Host_byte_counter_8()                  Host_data_length_U8()
00887 
00889 #define Host_get_pipe_length()                 ((U16)0x08 << ((UPCFG1X & MSK_PSIZE)>>4))
00890 
00892 #define Host_get_pipe_type()                   (UPCFG0X>>6)
00893 
00895 #define Host_error_status()                    (UPERRX & MSK_ERROR)
00897 #define Host_ack_all_errors()                  (UPERRX = 0x00)
00898 
00900 #define Host_enable_transmit_interrupt()       (UPIENX |= (1<<TXOUTE))
00902 #define Host_disable_transmit_interrupt()      (UPIENX &= ~(1<<TXOUTE))
00903 
00905 #define Host_enable_receive_interrupt()        (UPIENX |= (1<<RXINE))
00907 #define Host_disable_receive_interrupt()       (UPIENX &= ~(1<<RXINE))
00908 
00910 #define Host_enable_stall_interrupt()        (UPIENX |= (1<<RXSTALLE))
00912 #define Host_disable_stall_interrupt()       (UPIENX &= ~(1<<RXSTALLE))
00913 
00915 #define Host_enable_error_interrupt()        (UPIENX |= (1<<PERRE))
00917 #define Host_disable_error_interrupt()       (UPIENX &= ~(1<<PERRE))
00918 
00920 #define Host_enable_nak_interrupt()        (UPIENX |= (1<<NAKEDE))
00922 #define Host_disable_nak_interrupt()       (UPIENX &= ~(1<<NAKEDE))
00923 
00924 #define Get_pipe_token(x)                 ((x & (0x80)) ? TOKEN_IN : TOKEN_OUT)
00925 
00927 
00934 
00935 #define wSWAP(x)        \
00936    (   (((x)>>8)&0x00FF) \
00937    |   (((x)<<8)&0xFF00) \
00938    )
00939 
00940 
00948 #if !defined(BIG_ENDIAN) && !defined(LITTLE_ENDIAN)
00949    #error YOU MUST Define the Endian Type of target: LITTLE_ENDIAN or BIG_ENDIAN
00950 #endif
00951 #ifdef LITTLE_ENDIAN
00952    #define Usb_write_word_enum_struc(x)   (x)
00953 #else //BIG_ENDIAN
00954    #define Usb_write_word_enum_struc(x)   (wSWAP(x))
00955 #endif
00956 
00957 
00959 
00960 //_____ D E C L A R A T I O N ______________________________________________
00961 
00962 U8      usb_config_ep                (U8, U8);
00963 U8      usb_select_enpoint_interrupt (void);
00964 U16     usb_get_nb_byte_epw          (void);
00965 U8      usb_send_packet              (U8 , U8*, U8);
00966 U8      usb_read_packet              (U8 , U8*, U8);
00967 void    usb_halt_endpoint            (U8);
00968 void    usb_reset_endpoint           (U8);
00969 U8      usb_init_device              (void);
00970 
00971 U8      host_config_pipe             (U8, U8);
00972 U8      host_determine_pipe_size     (U16);
00973 void    host_disable_all_pipe        (void);
00974 U8      usb_get_nb_pipe_interrupt    (void);
00975 
00976 #endif  // _USB_DRV_H_
00977 

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