void Init_disp(void)
{
RCC-›AHBENR|=RCC_AHBENR_GPIOAEN;
RCC-›APB1ENR|=RCC_APB1ENR_TIM6EN;
RCC-›AHBENR|=RCC_AHBENR_DMA1EN;
GPIOA-›MODER|=
//GPIO_MODER_MODER0_1 |
GPIO_MODER_MODER1_0 |
GPIO_MODER_MODER2_0 |
GPIO_MODER_MODER3_0 |
GPIO_MODER_MODER4_0 |
GPIO_MODER_MODER5_0 |
GPIO_MODER_MODER6_0 |
GPIO_MODER_MODER7_0 |
GPIO_MODER_MODER8_0 |
GPIO_MODER_MODER9_0 |
GPIO_MODER_MODER10_0 |
GPIO_MODER_MODER11_0 |
GPIO_MODER_MODER12_0 ;
GPIOA-›OTYPER=0;
GPIOA-›PUPDR=0;
GPIOA-›OSPEEDR=0;
GPIOA-›ODR=0xFF;
TIM6-›CR1=0;
TIM6-›CR2=0;
TIM6-›PSC=320-1;
TIM6-›ARR=500-1;
TIM6-›SR&=~TIM_SR_UIF;
TIM6-›DIER|=TIM_DIER_UDE;
TIM6-›CR1|=TIM_CR1_CEN;
DMA1_Channel3-›CCR =
DMA_CCR_MSIZE_0|
DMA_CCR_PSIZE_0|
DMA_CCR_MINC |
DMA_CCR_DIR |
DMA_CCR_PL|
DMA_CCR_CIRC;
DMA1_Channel3-›CNDTR=0x04;
DMA1_Channel3-›CPAR =(uint32_t)&GPIOA-›ODR;
DMA1_Channel3-›CMAR =(uint32_t)disp_buf;
DMA1_Channel3-›CCR |=DMA_CCR_EN;
}
void Set_disp(uint8_t pos, uint8_t data)
{
disp_buf[pos]= (disp_buf[pos] & (~(((uint16_t)SEG_MASK)‹‹SEG_OFFSET) )) | ((((uint16_t)seg_table[data])& SEG_MASK)‹‹SEG_OFFSET);
} |