Фаилы необходимые при компиляции, необходимо их разбить по названиям и подставить inc файл нужного процесора
;************************************************* ****************************************
; GetChar Function
; Receives a Byte Of Data
; When reception is complete, _rcvOver Bit is cleared
; The received data is in RxReg
;
; Program Memory : 15 locations (17 locations if PARITY is used)
; Cycles : 16 (18 if PARITY is USED)
;
;************************************************* ****************************************
GetChar:
bcf STATUS,RP0
bsf _rcvOver ; Enable Reception, this bit gets reset on Byte Rcv Complete
LOAD_BITCOUNT
clrf RxReg
bcf _FrameErr
bcf _ParityErr ; Init Parity & Framing Errors
clrf TMR0
clrwdt
bsf STATUS,RP0
movlw 07h
movwf OPTION_REG
bcf STATUS,RP0
clrf TMR0
bsf STATUS,RP0
movlw 0Fh
movwf OPTION_REG
clrwdt
movlw _OPTION_SBIT ; Inc On Ext Clk Falling Edge
movwf OPTION_REG ; Set Option Reg Located In Page 1
bcf STATUS,RP0 ; make sure to select Page 0
movlw 0xFF
movwf TMR0 ; A Start Bit will roll over RTCC & Gen INT
bcf INTCON,T0IF
bsf INTCON,T0IE ; Enable RTCC Interrupt
retfie ; Enable Global Interrupt
;
;************************************************* ****************************************
; Internal Subroutine
; entered from Interrupt Service Routine when Start Bit Is detected.
;
; Program Memory : 14 locations
; Cycles : 12 (worst case)
;
;************************************************* ****************************************
_SBitDetected:
bcf STATUS,RP0
btfsc RX_Pin ; Make sure Start Bit Interrupt is not a Glitch
goto _FalseStartBit ; False Start Bit
bsf _rcvProgress
clrf TMR0
clrwdt
bsf STATUS,RP0
movlw 07h
movwf OPTION_REG
bcf STATUS,RP0
clrf TMR0
bsf STATUS,RP0
movlw 0Fh
movwf OPTION_REG
clrwdt
movlw (_BIT1_INIT | SBitPrescale) ; Switch Back to INT Clock
movwf OPTION_REG ; Set Option Reg Located In Page 1
bcf STATUS,RP0 ; make sure to select Page 0
LOAD_RTCC 1,(SBitRtccLoad), SBitPrescale
goto RestoreIntStatus
;
_FalseStartBit:
movlw 0xFF
movwf TMR0 ; reload RTCC with 0xFF for start bit detection
goto RestoreIntStatus
;
;************************************************* ****************************************
; Internal Subroutine
; entered from Interrupt Service Routine when Start Bit Is detected.
;
; Program Memory : 28 locations ( 43 locations with PARITY enabled)
;************************************************* ************************************************** ******
; PutChar Function
;
; Function to transmit A Byte Of Data
; Before calling this routine, load the Byte to be transmitted into TxReg
; Make sure _txmtProgress & _rcvOver bits (in Status Reg) are cleared before
; calling this routine
;
; Program Memory : 6 locations (10 locations if PARITY is Used)
; Cycles : 8 (13 if PARITY is Used)
;
;************************************************* ************************************************** ******
PutChar:
bsf _txmtEnable ; enable transmission
bsf _txmtProgress
LOAD_BITCOUNT ; Macro to load bit count
decf BitCount,1
if _DataBits == 7
bsf TxReg,7
endif
;
if _PARITY_ENABLE
movf TxReg,W
call GenParity ; If Parity is used, then Generate Parity Bit
endif
;
call _TxmtStartBit
bsf INTCON,T0IE ; Enable RTCC Overflow INT
retfie ; return with _GIE Bit Set
;
;************************************************* ************************************************** ******
; Internal Subroutine
; entered from Interrupt Service Routine when Start Bit Is detected.
;
; Program Memory : 30 locations (38 locations if PARITY is used)
; Cycles : 15 Worst Case
;
;************************************************* ************************************************** ******
_TxmtNextBit:
bcf STATUS,RP0
LOAD_RTCC 0,RtccPreLoad, RtccPrescale ; Macro to reload RTCC
;
movf BitCount, F ;done with data xmission?
btfsc STATUS,Z
goto _ParityOrStop ;yes, do parity or stop bit
;
decf BitCount, F
goto _NextTxmtBit ;no, send another
;
_ParityOrStop:
if _PARITY_ENABLE
btfsc ExtraBitCount,1 ;ready for parity bit?
goto _SendParity
endif
movf ExtraBitCount,1 ;check if sending stop bit
btfsc STATUS,Z
goto DoneTxmt
decf ExtraBitCount,1
;
_StopBit:
bsf TX ; STOP Bit is High
goto RestoreIntStatus
goto DoneTxmt
;
_NextTxmtBit:
bsf STATUS,C
rrf TxReg, F
btfss STATUS,C
bcf TX
;******************************************
NOLIST
;************************************************* ****************************************
; RS-232 Header File
; PIC16C6X/7X/8X
;************************************************* ****************************************
_ClkOut equ (_ClkIn ›› 2) ; Instruction Cycle Freq = CLKIN/4
;
_CyclesPerBit set (_ClkOut/_BaudRate)
_tempCompute set (_CyclesPerBit ››
;
;************************************************* ****************************************
; Auto Generation Of Prescaler & Rtcc Values
; Computed during Assembly Time
;************************************************* ****************************************
; At first set Default values for RtccPrescale & RtccPreLoad
;
RtccPrescale set 0
RtccPreLoad set _CyclesPerBit
UsePrescale set FALSE
if (_tempCompute ›= 1)
RtccPrescale set 0
RtccPreLoad set (_CyclesPerBit ›› 1)
UsePrescale set TRUE
endif
if (_tempCompute ›= 2)
RtccPrescale set 1
RtccPreLoad set (_CyclesPerBit ›› 2)
endif
if (_tempCompute ›= 4)
RtccPrescale set 2
RtccPreLoad set (_CyclesPerBit ›› 3)
endif
if (_tempCompute ›=
RtccPrescale set 3
RtccPreLoad set (_CyclesPerBit ›› 4)
endif
if (_tempCompute ›= 16)
RtccPrescale set 4
RtccPreLoad set (_CyclesPerBit ›› 5)
endif
if (_tempCompute ›= 32)
RtccPrescale set 5
RtccPreLoad set (_CyclesPerBit ›› 6)
endif
if (_tempCompute ›= 64)
RtccPrescale set 6
RtccPreLoad set (_CyclesPerBit ›› 7)
endif
if (_tempCompute ›= 12
RtccPrescale set 7
RtccPreLoad set (_CyclesPerBit ››
endif
;
if( (RtccPrescale == 0) && (RtccPreLoad ‹ 60))
messg "Warning : Baud Rate May Be Too High For This Input Clock"
endif
;
; Compute RTCC & Presclaer Values For 1.5 Times the Baud Rate for Start Bit Detection
;
_SBitCycles set (_ClkOut/_BaudRate) + ((_ClkOut/4)/_BaudRate)
_tempCompute set (_SBitCycles ››
_BIT1_INIT set 08
SBitPrescale set 0
SBitRtccLoad set _SBitCycles
if (_tempCompute ›= 1)
SBitPrescale set 0
SBitRtccLoad set (_SBitCycles ›› 1)
_BIT1_INIT set 0
endif
if (_tempCompute ›= 2)
SBitPrescale set 1
SBitRtccLoad set (_SBitCycles ›› 2)
endif
if (_tempCompute ›= 4)
SBitPrescale set 2
SBitRtccLoad set (_SBitCycles ›› 3)
endif
if (_tempCompute ›=
SBitPrescale set 3
SBitRtccLoad set (_SBitCycles ›› 4)
endif
if (_tempCompute ›= 16)
SBitPrescale set 4
SBitRtccLoad set (_SBitCycles ›› 5)
endif
if (_tempCompute ›= 32)
SBitPrescale set 5
SBitRtccLoad set (_SBitCycles ›› 6)
endif
if (_tempCompute ›= 64)
SBitPrescale set 6
SBitRtccLoad set (_SBitCycles ›› 7)
endif
if (_tempCompute ›= 12
SBitPrescale set 7
SBitRtccLoad set (_SBitCycles ››
endif
;
;************************************************* ****************************************
;
#define _Cycle_Offset1 24 ;account for interrupt latency, call time
LOAD_RTCC MACRO Mode, K, Prescale
if(UsePrescale == 0 && Mode == 0)
movlw -K + _Cycle_Offset1
else
movlw -K + (_Cycle_Offset1 ›› (Prescale+1)) ; Re Load RTCC init value + INT Latency Offset
endif
movwf TMR0 ; Note that Prescaler is cleared when RTCC is written
ENDM
;************************************************* ****************************************
LOAD_BITCOUNT MACRO
movlw _DataBits+1
movwf BitCount
movlw 1
movwf ExtraBitCount
if _PARITY_ENABLE
movlw 2
movwf ExtraBitCount
endif
ENDM
;
;************************************************* *************************************************
; Pin Assignements
;************************************************* *************************************************
#define RX_MASK 0x7 ; RX pin is connected to RA4, ie. bit 4
#define RX_Pin PORTB,0 ; RX Pin : RB0
#define RX RxTemp,4
#define TX PORTB,3 ; TX Pin , RB3
#define _RTS PORTB,5 ; RTS Pin, RB5, Output signal
#define _CTS PORTB,6 ; CTS Pin, RB6, Input signal
#define _txmtProgress SerialStatus,0
#define _txmtEnable SerialStatus,1
#define _rcvProgress SerialStatus,2
#define _rcvOver SerialStatus,3
#define _ParityErr SerialStatus,4
#define _FrameErr SerialStatus,5
#define _parityBit SerialStatus,7
;************************************************* **************************************************
_OPTION_SBIT set 0x38 ; Increment on Ext Clock (falling edge), for START Bit Detect
if UsePrescale
_OPTION_INIT set 0x00 ; Prescaler is used depending on Input Clock & Baud Rate
else
_OPTION_INIT set 0x0F
endif
CBLOCK 0x0C
TxReg ; Transmit Data Holding/Shift Reg
RxReg ; Rcv Data Holding Reg
RxTemp
SerialStatus ; Txmt & Rev Status/Control Reg
BitCount
ExtraBitCount ; Parity & Stop Bit Count
SaveWReg ; temp hold reg of WREG on INT
SaveStatus ; temp hold reg of STATUS Reg on INT
temp1, temp2
ENDC
;************************************************* **************************************************
LIST