/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f0xx_system
* @{
*/
/** @addtogroup STM32F0xx_System_Private_Includes
* @{
*/
#include "stm32f0xx.h"
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Defines
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Variables
* @{
*/
uint32_t SystemCoreClock = 8000000;
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
* @{
*/
static void SetSysClock(void);
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Set HSION bit */
RCC-›CR |= (uint32_t)0x00000001;
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
RCC-›CFGR &= (uint32_t)0xF8FFB80C;
/* Reset HSEON, CSSON and PLLON bits */
RCC-›CR &= (uint32_t)0xFEF6FFFF;
/* Reset HSEBYP bit */
RCC-›CR &= (uint32_t)0xFFFBFFFF;
/* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
RCC-›CFGR &= (uint32_t)0xFFC0FFFF;
/* Reset PREDIV1[3:0] bits */
RCC-›CFGR2 &= (uint32_t)0xFFFFFFF0;
/* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
RCC-›CFGR3 &= (uint32_t)0xFFFFFEAC;
/* Reset HSI14 bit */
RCC-›CR2 &= (uint32_t)0xFFFFFFFE;
/* Disable all interrupts */
RCC-›CIR = 0x00000000;
/* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
SetSysClock();
}
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC-›CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC-›CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC-›CFGR & RCC_CFGR_PLLSRC;
pllmull = ( pllmull ›› 1
+ 2;
if (pllsource == 0x00)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE ›› 1) * pllmull;
}
else
{
prediv1factor = (RCC-›CFGR2 & RCC_CFGR2_PREDIV1) + 1;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
break;
default: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC-›CFGR & RCC_CFGR_HPRE) ›› 4)];
/* HCLK clock frequency */
SystemCoreClock ››= tmp;
}
/**
* @brief Configures the System clock frequency, AHB/APBx prescalers and Flash
* settings.
* @note This function should be called only once the RCC clock configuration
* is reset to the default reset state (done in SystemInit() function).
* @param None
* @retval None
*/
static void SetSysClock(void)
{
/************************************************** ****************************/
/* HSI used as System clock source */
/************************************************** ****************************/
/* At this stage the HSI is already enabled and used as System clock source */
/* Enable Prefetch Buffer and Flash 0 wait state */
FLASH-›ACR = FLASH_ACR_PRFTBE;
/* HCLK = SYSCLK / 16 */
RCC-›CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV16;
/* PCLK = HCLK / 1 */
RCC-›CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Re: stm32 HAL UART - не могу понять
