Port for AVR (Atmel)

IAR Embedded Workbench


General

AVR is 8-bit RISC Harvard processor and has 32 general purpose registers (GPR). Also it has Status Register (SREG) and Stack Pointer Pair (SPH:SPL). Therefore, context in the processor consists of:

32 (GPR) + 1 (SREG) + 2 (SPH:SPL) = 35 registers or 35 bytes.

This means that each user's process must have stack greater at least context size (35 bytes) + call depth multiplied by 2.

Due to lame hardware stack pointer in AVR, IAR EWAVR uses separate data stack with Y-pointer (register pair r29:r28) as data stack pointer. So, IAR EWAVR uses two stacks - data stack and return stack. Size of each stack can be specified individually.


Program Control Flow Transfer

Both methods - direct and software interrupt - are supported in the port.

In case of direct program control flow transfer there are no any peculiarities.

In case of software interrupt program control flow transfer a situation is the following: unfortunately, MSP430 has no special software interrupt, therefore, one of hardware interrupts has been used. Any scmRTOS release has default Software Context Switch interrupt assignment. The user can leave this default assignment or change the assignment by analogy with defaults according to his project requirements. This assignment is defined in project-dependent part of the RTOS - scmRTOS_TARGET_CFG.h header file.


Interrupts

The using of interrupts with scmRTOS does not make any special demands. The user should keep in mind two things:

  • interrupt service routine (ISR) function must be qualified with OS_INTERRUPT macro;
  • TISRW or TISRW_SS object must be declared at the beginning of the ISR. This object involves constructor and destructor that play very important role in the RTOS rescheduling mechanism and integrity. There are two scenarios when entering ISR: switch to separate ISR stack by software or work in current stack. In case of current stack TISRW object must be used, otherwise, in case of separate ISR stack - TISRW_SS object.

When TISRW_SS object is used, interrupt body executed in separate ISR stack. This stack occupies the the space that was used by processor's stack before the RTOS starts. Therefore, this stack depth is defined in linker script by directive:

-D_..X_CSTACK_SIZE=#N
-D_..X_RSTACK_SIZE=#M

where #N and #M - stack sizes for data and return addresses accordingly.

The user can set the value of the stack using this directive or IDE options (in case of using of IAR Embedded Workbench).


System Timer

scmRTOS v3 allows for user to choose any available hardware timer, fully setup the timer and setup interrupt vector of the timer. As Software Context Switch interrupt assignment, any scmRTOS release has default timer assignment. The user can leave this default assignment or change the assignment by analogy with defaults according to his project requirements. All project-dependent definitions of System Timer hardware implementation (setting, interrupt vector, etc.) resided in project-dependent part of the RTOS - scmRTOS_TARGET_CFG.h header file.


Summary

See Release info for more details about port features and using examples.

As usual, see User's Manual for more details about RTOS contents, structure, functionality and features.