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||CMOS Device Modeling for Subthreshold Circuits|
Dept. of Electr. Eng., Stanford Univ., CA;
This paper appears in: Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on [see also Circuits and Systems II: Express Briefs, IEEE Transactions on]
Publication Date: Aug 1992
On page(s): 532-539
Volume: 39, Issue: 8
References Cited: 11
||CMOS Digital Integrated Circuits|
by Sung-Mo (Steve) Kang, Yusuf Leblebici `The electronics industry has achieved a phenomenal growth over the last few decades, mainly due to the rapid advances in integration technologies and large-scale systems...`
||CMOS Memory Circuits|
Tegze P. Haraszti
Kluwer Academic Publishers 2000
Hardcover. 576 pp.
CMOS Memory Circuits is a systematic and comprehensive reference work designed to aid in the understanding of CMOS memory circuits, architectures, and design techniques.
CMOS technology is the dominant fabrication method and almost the exclusive choice for semiconductor memory designers.
Both the quantity and the variety of complementary-metal-oxide-semiconductor (CMOS) memories are staggering. CMOS memories are traded as mass-products worldwide and are diversified to satisfy nearly all practical requirements in operational speed, power, size, and environmental tolerance. Without the outstanding speed, power, and packing density characteristics of CMOS memories, neither personal computing, nor space exploration, nor superior defense systems, nor many other feats of human ingenuity could be accomplished. Electronic systems need continuous improvements in speed performance, power consumption, packing density, size, weight, and costs. These needs continue to spur the rapid advancement of CMOS memory processing and circuit technologies.
Three revision lectures will be given on the topics listed below. The example problems are all taken
from past papers and are intended to cover the full range of the course. It should not be assumed
that this year’s questions will be on these precise topics.