;************************************************* *****************************
; start of code
;************************************************* *****************************
#include ‹tn2313def.inc›
.org 0x00
rjmp RESET
.org 0x07
rjmp RX_COMPLETE_INT
;************************************************* *****************************
; data tables
;************************************************* *****************************
.org 0x100
sine: ; 256 step sinewave table
.db 0x80,0x83,0x86,0x89,0x8c,0x8f,0x92,0x95,0x98,0x9c, 0x9f,0xa2,0xa5,0xa8,0xab,0xae
.db 0xb0,0xb3,0xb6,0xb9,0xbc,0xbf,0xc1,0xc4,0xc7,0xc9, 0xcc,0xce,0xd1,0xd3,0xd5,0xd8
.db 0xda,0xdc,0xde,0xe0,0xe2,0xe4,0xe6,0xe8,0xea,0xec, 0xed,0xef,0xf0,0xf2,0xf3,0xf5
.db 0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfc,0xfd,0xfe, 0xfe,0xff,0xff,0xff,0xff,0xff
.db 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xfe,0xfd,0xfc, 0xfc,0xfb,0xfa,0xf9,0xf8,0xf7
.db 0xf6,0xf5,0xf3,0xf2,0xf0,0xef,0xed,0xec,0xea,0xe8, 0xe6,0xe4,0xe2,0xe0,0xde,0xdc
.db 0xda,0xd8,0xd5,0xd3,0xd1,0xce,0xcc,0xc9,0xc7,0xc4, 0xc1,0xbf,0xbc,0xb9,0xb6,0xb3
.db 0xb0,0xae,0xab,0xa8,0xa5,0xa2,0x9f,0x9c,0x98,0x95, 0x92,0x8f,0x8c,0x89,0x86,0x83
.db 0x80,0x7c,0x79,0x76,0x73,0x70,0x6d,0x6a,0x67,0x63, 0x60,0x5d,0x5a,0x57,0x54,0x51
.db 0x4f,0x4c,0x49,0x46,0x43,0x40,0x3e,0x3b,0x38,0x36, 0x33,0x31,0x2e,0x2c,0x2a,0x27
.db 0x25,0x23,0x21,0x1f,0x1d,0x1b,0x19,0x17,0x15,0x13, 0x12,0x10,0x0f,0x0d,0x0c,0x0a
.db 0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x03,0x02,0x01, 0x01,0x00,0x00,0x00,0x00,0x00
.db 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x02,0x03, 0x03,0x04,0x05,0x06,0x07,0x08
.db 0x09,0x0a,0x0c,0x0d,0x0f,0x10,0x12,0x13,0x15,0x17, 0x19,0x1b,0x1d,0x1f,0x21,0x23
.db 0x25,0x27,0x2a,0x2c,0x2e,0x31,0x33,0x36,0x38,0x3b, 0x3e,0x40,0x43,0x46,0x49,0x4c
.db 0x4f,0x51,0x54,0x57,0x5a,0x5d,0x60,0x63,0x67,0x6a, 0x6d,0x70,0x73,0x76,0x79,0x7c
RESET:
ldi r16, RAMEND
out SPL, r16 ; setup stack pointer
; Set baud rate
ldi r16,25
ldi r17,0
out UBRRH, r17
out UBRRL, r16
; Enable receiver and transmiter
ldi r16,(1‹‹RXCIE)|(1‹‹RXEN)|(1‹‹TXEN)
out UCSRB,r16
; Set frame format: 8data, 2stop
ldi r16, (1‹‹USBS)|(3‹‹UCSZ0)
out UCSRC,r16
sei ; global enable interrupts
ser r16 ;
out DDRB,r16 ; set all PORTB bits as output
; set sinewave output
ldi r31,high(sine) ; setup Z pointer hi
ldi r30,low(sine) ; setup Z pointer lo
; clear accumulator
ldi r29,0x00 ; clear accumulator
ldi r28,0x00 ; clear accumulator
; setup adder registers
ldi r24,0x7A ; setup adder value
ldi r25,0x14 ; to 10 kHz
ldi r26,0x02 ;
ldi r17,'0' ;ôëàã - íå çàïóùåí, "1" - çàïóùåí
; main loop
wait:
cpi r17,'0' ; up one
breq wait
LOOP1:
add r28,r24 ;1
adc r29,r25 ;1
adc r30,r26 ;1
lpm ;3
out PORTB,r0 ;1
in r18,sreg ;1
cpi r17,'0' ;1
breq wait ;1
out sreg,r18 ;1
rjmp LOOP1 ;2 =› 13 cycles
;************************************************* *********************
; communication functionality
;************************************************* *********************
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